Conventionally, high breakdown voltage LDMOSes (Laterally Diffused Metal Oxide Semiconductors) are used. For example, a paper “Theory of Semiconductor Superjunction Devices” (NPD 1) discloses a high breakdown voltage LDMOS having a trench gate structure. This high breakdown voltage LDMOS has a so-called double resurf structure.
Further, Japanese Patent Laying-Open No. 11-307763 (PTD 1) discloses a high breakdown voltage MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having a back gate region structure. In this high breakdown voltage MOSFET, a source region is arranged to face a drain region with a gate electrode sandwiched therebetween, as seen in a plan view. PTD 1 discloses a configuration in which three sides of the source region not facing the gate electrode are surrounded by a back gate region.